Acer Power SP Technical Information PDF herunterladen (Seite 54)

48 Chapter 4

10h Auto detect flash type to load appropriate flash R/W codes into

the run time area in F000 for ESCD & DMI support.

11h Reserved

12h Use walking 1’s algorithm to check out interface in CMOS cir-

cuitry. Also set real-time clock power status, and then check for

override.

13h Reserved

14h Program chipset default values into chipset. Chipset default val-

ues are MODBINable by OEM customers.

15h Reserved

16h Initial onboard clock generator if Early_Init_Onboard_Generator

is defined. See also POST 26h.

17h Reserved

18h Detect CPU information including brand, SMI type (Cyrix or

Intel) and CPU level (586 or 686).

19h Reserved

1Ah Reserved

1Bh Initial interrupts vector table. If no special specified, all H/W

interrupts are directed to SPURIOUS_INT_HDLR & S/W inter-

rupts to SPURIOUS_soft_HDLR.

1Ch Reserved

1Dh Initial EARLY_PM_INIT switch

1Eh Reserved

1Fh Load keyboard matrix (notebook platform)

20h Reserved

21h HPM Initialization (notebook platform)

22h Reserved

23h

1. Check validity of RTC value:

e.g. a value of 5Ah is an invalid value for RTC minute.

2. Load CMOS settings into BIOS stack. If Smos check-

sum fails, use default value instead.

24h Prepare BIOS resource map for PCI & PnP use. If ESCD is

valid, take into consideration of the ESCD’s legacy information.

25h Early PCI Initialization:

• Enumerate PCI bus number

• Assign memory & I/O resource

• Search for a valid VGA device & VGA BIOS, and put

it into C000:0

26h

1. If Early_Init_Onboard_Generator is not defined

Onboard clock generator initialization. Disable

respective clock resource to empty PCI & DIMM

slots.

2. Init onboard PWM

3. Init onboard H/W monitor devices

27h Initialize INT 09 buffer

28h Reserved

Checkpoint Description

1 2 ... 49 50 51 52 53 54 55 56 57 58 59 ... 71 72

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