Acer TT.R5900.101 Datenblatt PDF herunterladen (Seite 16)

Acer AT350 F1 Specifications

Mirroring mode:

• In mirroring mode, the memory contains a primary image and a copy of the primary image therefore the

effective size of memory is reduced by one half.

• Channel 3 has no function in these modes.

• Follow the population rules described in independent mode.

• Mirroring mode needs the channel 1 & channel 2 DIMMs to be identical. DIMM slot populations within a

channel do not have to be identical but the same DIMM slot location across channel 1 and channel 2

must be the same. DIMM1A and DIMM2A should be the same type, size and manufacturer. DIMM1B

and DIMM2B memory should be the same type, size and manufacturer. DIMM1C and DIMM2C

memory should be the same type, size and manufacturer.

• Same rules apply to CPU2.

• 3 DIMMs per channel configuration is only available for single/dual rank RDIMM.

• Please refer to the User Guide for complete population rules for both single and dual processor

configurations.

Lockstep mode:

• In Lockstep Channel Mode, each memory access is 128-bit data access that spans Channel 1 and

Channel 2. This is done to support SDDC for DRAM devices with 8-bit wide data ports. The same

address is used on both channels such that an address error on any channel is detectable.

• Lockstep Channel mode is the only RAS mode that supports x8 SDDC.

• Channel 3 has no function in these modes.

• Follow the population rules described in independent mode.

• Lockstep mode needs the channel 1 & channel 2 DIMMs to be identical. DIMM slot populations within a

channel do not have to be identical but the same DIMM slot location across channel 1 and channel 2

must be the same. DIMM1A and DIMM2A should be the same type, size and manufacturer. DIMM1B

and DIMM2B memory should be the same type, size and manufacturer. DIMM1C and DIMM2C

memory should be the same type, size and manufacturer.

• Same rules apply to CPU2.

• 3 DIMMs per channel configuration is only available for single/dual rank RDIMM.

• Please refer to the User Guide for complete population rules for both single and dual processor

configurations.

Sparing mode:

• In sparing mode, if the system detects degrading memory, the data in the failed channel will be copied to

the spare channel. The failed channel is then isolated and the spare channel becomes active. Any

uncorrectable error detected before the isolation will cause the system to stop normal operation.

• Channel 3 is the spare channel. Therefore, the effective size will be reduced by one-third.

• Follow the population rules described in independent mode.

• Sparing mode needs all three channels to utilize identical DIMMs. 1A, 2A and 3A should be the same

type, size and manufacturer. 1B, 2B and 3B memory should be the same type, size and manufacturer.

1C, 2C and 3C memory should be the same type, size and manufacturer.

• Same rule is applied to CPU2.

• 3 DIMMs per channel configuration is only available for single/dual rank RDIMM.

• Please refer to the User Guide for complete population rules for both single and dual processor

configurations.

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