Acer PD721 Technical Information PDF herunterladen (Seite 14)

7 Chapter 1

Main Board Block Diagram

D-Sub output

Analog Input

Digital Input

Video Decoder

Memory

Image Process

MIS

Thermal Board

LVPS Module

DMD Module

R.G.B.H.Vsync

Digital R.G.B data

H.Vsync

SDA

SCL

GCLK

y (0-7)

UV (0-7)

GM-VHS

GM-VVS

GM-VPEN

GM-VCLK

Standby out

7 Sec

RESET

MCLK

DCLK

KDS (0-3)

KDR (0-2)

ERR

Standby-1

ECOMODE

LAMP Lit

Digital R.G.B Data

DCLK0

DENR

DVS

DHS

LAMP ON / Lamp Lit

RESET# / Lamp Lit

RESET0 / Lamp Lit

LAMP-IN

LAMP-OUT

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